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september 2006 rev 1 1/27 1 L9524C glow plug system control ic features quad gate driver for external n-channel power mosfets in high-side configuration: ? gates driven by pwm output signal ? adjustable gate charge/discharge currents ? limited gate-to-source voltages ? negative clamping for inductive loads ? advanced run-off control ? regulation of the power through the glow plugs control output for external relay driver battery-voltage-compatible two-wire interface supply voltage monitoring with shutdown battery voltage monitoring with shutdown junction temperature monitoring with shutdown monitoring of currents through the glow plugs with shutdown at overcurrent (adjustable threshold) monitoring of external switches charge pump voltage monitoring with shutdown active clamping during load dump description the L9524C is a control ic for up to six glow plugs of diesel engines. the glow plugs are switched by up to four external pwm-controlled n- channel power mosfets or a single relay in high-side configuration. supply voltage, battery voltage, junction temperature, switches, currents through the glow plugs, and charge pump voltage are monitored. a two-wire interface is used to communicate with the diesel engine management system. order codes so24 part number package packing L9524C-tr so24 tape & reel www.st.com 4 .com u datasheet
contents L9524C 2/27 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 diagnostic output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.4 current monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 switch monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.6 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.8 relay output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.9 gate charge/discharge current variation . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.10 overcurrent threshold variation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.11 advanced run-off control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 power regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4 .com u datasheet
L9524C list of tables 3/27 list of tables table 1. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 6. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4 .com u datasheet
list of figures L9524C 4/27 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. shunt sense versus transistor sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 4. control input signal in transistor mode (modes 3 to 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 5. permanent switch on of gl ow plugs at first falling edge in tr ansistor mode (modes 3 to 6) 14 figure 6. control input signal in mode 2 for permanent switch on . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 7. serial diagnostic interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 8. variation of gate charge/discharge current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 9. timing diagram of advanced run-off control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 10. output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 11. mode 1: relay mode, go/no-go diagnostic interface protocol . . . . . . . . . . . . . . . . . . . . . . . 22 figure 12. mode 2: relay mode, serial diagnostic interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 13. mode 3: transistor mode, shunt sense, no power regulation . . . . . . . . . . . . . . . . . . . . . . . 23 figure 14. mode 4: transistor mode, shunt sense, power regulation . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 15. mode 5: transistor mode, transistor sense, no power regulation . . . . . . . . . . . . . . . . . . . . 24 figure 16. mode 6: transistor mode, transistor sense, power regulation . . . . . . . . . . . . . . . . . . . . . . . 24 figure 17. so24 mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4 .com u datasheet
L9524C block diagram 5/27 1 block diagram figure 1. block diagram 4 .com u datasheet
pin description L9524C 6/27 2 pin description figure 2. pin connection (top view) table 1. pin description n pin function 1 sp1 positive sense input, glow plug 1 2 g1 driver output for external high-side power mosfet, transistor 1 3 sn1 negative sense input, glow plug 1 4 sp2 positive sense input, glow plugs 2 and 5 5 g2 driver output for external high-side power mosfet, transistor 2 6 sn5 negative sense input, glow plug 5 7 sn2 negative sense input, glow plug 2 8 bat battery voltage input 9 do diagnostic output 10 vs supply voltage input 11 cp charge pump output 12 oct overcurrent threshold setting 13 io transistor mode: input for selection of power regulation feature relay mode: output to control external relay driver 14 cur power mosfet gate charge/discharge current setting 15 ms mode selection input: transistor modes (transistor sense / shunt sense) / relay mode 16 gnd ground pin 17 ci control input 18 sn4 negative sense input, glow plug 4 19 sn6 negative sense input, glow plug 6 20 g4 driver output for external high-side power mosfet, transistor 4 21 sp4 positive sense input, glow plugs 4 and 6 22 sn3 negative sense input, glow plug 3 23 g3 driver output for external high-side power mosfet, transistor 3 24 sp3 positive sense input, glow plug 3 24 sp3 23 g3 sn3 22 sp4 21 20 g4 sn6 19 sn4 18 17 ci gnd 16 ms 15 sp1 1 g1 2 3 sn1 sp2 4 g2 5 6 sn5 sn2 7 bat 8 9 do vs 10 cur 14 io 13 11 cp oct 12 4 .com u datasheet
L9524C electrical specifications 7/27 3 electrical specifications 3.1 absolute maximum ratings warning: the device may become damaged if using externally applied voltages or currents exceeding these limits! all pins of the ic are protected against esd. the verification is performed according to mil883c, human body model with r=1.5k , c=100pf and discharge voltage 2kv, corresponding to a maximum discharge energy of 0.2mj. 3.2 thermal data table 2. absolute maximum ratings symbol parameter value unit v vs supply voltage range -0.3 to 45 v |dv vs /dt| supply voltage slope 10 v/ s v cp charge pump voltage range -0.3 to 45 v v bat , v ci , v sp1-4 , v sn1-6 input pin voltage range (bat, ci, sp1-4, sn1-6) -16 to 45 v v oct , v cur , v ms , v io input pin voltage range (oct, cur, ms, io) -0.3 to 7 v v do , v g1-4 output pin voltage range (do, g1-4) -16 to 45 v table 3. thermal data symbol parameter value unit t j operating junction temperature -40 to 125 c t jsd junction temperature thermal shutdown threshold 125 to 150 c 4 .com u datasheet
electrical specifications L9524C 8/27 3.3 electrical characteristics 5v v vs ;v bat 18v, -40 c t j 125 c, unless otherwise specified. the voltages are referred to gnd and currents are assumed positive, when current flows into the pin. table 4. electrical characteristics item symbol parameter test c ondition min. typ. max. unit supply (vs) 1.1 i vs supply current 1 5 20 ma 1.2 v vs uv undervoltage threshold 4 5 v 1.3 v vs uvh undervoltage threshold hysteresis (1) 0.2 0.4 v 1.4 v vs ol open-load detection threshold 5.5 7.2 v 1.5 v vs ov overvoltage threshold 18 22 v 1.6 v vs ovh overvoltage threshold hysteresis (1) 0.4 1.6 v 1.7 v vs ld load dump threshold 28 35 v 1.8 t vs fil filter time (2) 24ms 1.9 t vs ld load dump delay time (1) 10 s supply (bat) 2.1 i bat leak leakage current v vs 3v 0v v bat 12v 05 a 2.2 r bat internal pull-down resistance 25 100 k 2.3 v bat uv battery undervoltage threshold v ms > v ms tr (transistor mode) 1 2 v 2.4 t bat fil filter time (2) 300 760 s charge pump (cp) 3.1 v cp charge pump voltage i cp = -100 a v vs +5v v vs +18v 3.2 i cp charging current v cp = v vs + 5v -1500 -100 a 3.3 v cp uv charge pump undervoltage threshold v vs +3.5v v vs +5v 3.4 f cp charge pump frequency (1) 1.5 7 mhz 3.5 t cp fil filter time (2) 400 950 s 4 .com u datasheet
L9524C electrical specifications 9/27 control input (ci) 4.1 v ci off input ?off? level 0.6 v vs 4.2 v ci on input ?on? level 0.4 v vs 4.3 v ci h off-to-on hysteresis (1) 0.03 v vs 0.04 v vs 0.05 v vs 4.4 v ci to input ?timeout? threshold 1 1.8 v 4.5 r ci internal pull-up resistance v ci v vs 20 80 k 4.6 t ci fil filter time (2) 0.5 1 ms 4.7 t ci to pwm timeout (2) 50 100 ms diagnostic output (do) 5.1 v dol output low voltage v vs 4.5v; i do 5ma 0.3 1.5 v 5.2 r do internal pull-up resistance v do v vs 20 80 k 5.3 i do max current limitation 5 20 ma monitoring of currents through glow plugs ( sp1-sn1, sp2-sn2, sp3-sn3, sp4-sn4, sp2-sn5, sp4-sn6) 6.1 v ol open-load threshold 6v v spx ;v snx v vs + 3v 8 16 mv 6.2 v oc 0 overcurrent threshold 1.5v v spx ;v snx v vs + 3v v ms < v ms tc (shunt sense) oct pin open 160 185 mv 1.5v v spx ;v snx v vs + 3v v ms < v ms tc (shunt sense) 0v v oct v cur v oct 0.385 v oct 0.445 1.5v v spx ;v snx v vs + 3v v ms >v ms tc (transistor sense) ? = -40 c; oct pin open 145 200 mv 1.5v v spx ;v snx v vs + 3v v ms >v ms tc (transistor sense) ? = -40 c; 0v v oct v cur v oct 0.345 v oct 0.485 6.3 tc oc overcurrent threshold temperature coefficient v ms < v ms tc (shunt sense) 1) 0k -1 v ms >v ms tc (transistor sense) oct pin open 0.008 0.012 k -1 6.4 t ol fil open-load filter time (2) v ms > v ms tr (transistor mode) 0.8 1.7 ms v ms < v ms tr (relay mode) 2 4 ms 6.5 t oc fil overcurrent filter time (2) 400 950 s table 4. electrical characteristics (continued) item symbol parameter test c ondition min. typ. max. unit 4 .com u datasheet
electrical specifications L9524C 10/27 monitoring of external sw itches (sn1, sn2, sn3, sn4) 7.1 v sd switch defect threshold v vs 0.4 v vs 0.6 7.2 t sd fil switch defect filter time (2) 24ms gate driver outputs (g1, g2, g3, g4) 8.1 v g off gate off voltage i gx 100 av snx v snx +0.7v 8.2 v g on gate on voltage v snx = v vs v vs +5v v vs +10v 8.3 v g cl gate clamping voltage v snx = -20v -18 -16 v 8.4 i g off gate discharge current 4v v gx v cp i cur = 0 0.7 1.5 ma 8.5 i g on gate charge current 0v v gx v vs i cur = 0 -1.5 -0.7 ma 8.6 di g off /di cur variation of gate discharge current -150 a i cur 0 4.25 5.25 8.7 di g on /di cur variation of gate charge current -150 a i cur 0 -5.25 -4.25 8.8 r g output resistance (1) 1k 8.9 t g on jitter of output on time -300 300 s mode input / relay output (io) 9.1 v io on output on voltage i io -100 a36v 9.2 r io output resistance i io -1ma 100 500 w 9.3 i io input pull-down current v io 1v 25 100 a v vs = 0v 50 500 a 9.4 i io max current limitation -25 -5 ma 9.5 v io pr power regulation threshold 12v 9.6 t io sup pulse suppress time (2) 2.5 5 ms positive sense inputs (sp1, sp2, sp3, sp4) 10.1 i sp input pull-down current v snx = v spx 6v 15 215 a 10.2 i sp leak leakage current v vs 3v 0 v spx v bat 05 a negative sense inputs (sn1, sn2, sn3, sn4, sn5, sn6) 11.1 i sn input pull-down current v snx = v spx 6v 15 780 a table 4. electrical characteristics (continued) item symbol parameter test c ondition min. typ. max. unit 4 .com u datasheet
L9524C electrical specifications 11/27 11.2 r sn1-4 input resistance 6v v snx = v spx 20v 40 160 k overcurrent threshold setting (oct) 12.1 i oct input pull-up current v vs 6v v oct = 3.5v -40 -10 a power mosfet gate charge/dis charge current setting (cur) 13.1 v cur output voltage i cur -150 a2.352.52.65v 13.2 i cur max current limitation v cur 2v -500 -250 a input pin for mode selection (ms) 14.1 i ms pull-up current v ms = 3v -60 -15 a 14.2 v ms tr transistor mode threshold 12v 14.3 v ms tc temperature compensation threshold v vs 6v 3 4 v output timing 15.1 t del delay time (2) 2.5 5 ms 15.2 t gap gap between channels (2) 50 250 s 15.3 t sup failure suppress time (2) 400 950 s power regulation 16.1 v rms accuracy 8v v bat 16v 30ms t ci 33ms t ci on /t ci 20% -1.5% v rmsr ef 1.5% v rmsr ef 1. not tested, guaranteed by design 2. time constants created digitall y, verified by scan path test table 4. electrical characteristics (continued) item symbol parameter test c ondition min. typ. max. unit 4 .com u datasheet
functional description L9524C 12/27 4 functional description 4.1 operating modes the L9524C can operate in a total of 6 modes. the selection is done by short-circuiting the appropriate pins and voltages as shown in the following table: modes 1 and 2 are for relay usage (referred to as ?relay mode?) and modes 3 to 6 for transistors usage (referred to as ?transistor mode?). in relay mode the protocol of the diagnostic interface (do pin) can be selected from go/no- go protocol and serial protocol (see section ?diagnostic output? for protocol description). in transistor mode the protocol of the diagnost ic interface is the seri al protocol. it can be distinguished between using shunts for monitoring the current through the glow plugs (referred to as ?shunt sense?) or using the r ds(on) of the power mosfets themselves (referred to as ?transistor sense?). in shunt sense mode the resistance of the shunt is assumed to be constant with respect to the temperature while in transistor sense mode the r ds(on) of the power mosfets is assumed to vary with respect to the temperature and therefore overcurrent monitoring is adjusted appropriately. in transistor mode there are two possibilities to control the output timing. in modes 3 and 5 the timing of the pwm control input signal det ermines the timing of the pwm signals applied to the external power mosfets (?no power regulation?). in modes 4 and 6 the timing of the pwm control input signal determines the power through the glow plugs (?power regulation?) and the timing of the pwm signals applied to the external power mosfets is adjusted depending on the battery voltage (see section ?power regulation?). table 5. mode mode description ms pin bat pin io pin ci pin 1 relay mode, go/no-go diagnostic interface protocol ground ground output statical signal 2 relay mode, serial diagnostic interface protocol ground battery output pwm signal 3 transistor mode, shunt sense, no power regulation cur pin battery cur pin pwm signal 4 transistor mode, shunt sense, power regulation cur pin battery ground pwm signal 5 transistor mode, transistor sense, no power regulation open battery cur pin pwm signal 6 transistor mode, transistor sense, power regulation open battery ground pwm signal 4 .com u datasheet
L9524C functional description 13/27 figure 3. shunt sense versus transistor sense 4.2 supply the main supply pin of the L9524C is the vs pin. the voltage applied to it (v vs ) is monitored to switch off all glow plug s if it is less than v vs uv for at least t vs fil (?undervoltage failure?), to switch off all glow plug s if it is greater than v vs ov for at least t vs fil (?overvoltage failure?), to switch on all glow plugs if it is greater than v vs ld for at least t vs ld (?active clamping during load dump?), to ignore open-load failure s if it is less than v vs ol . note: the glow plugs are switched on again if the corresponding switch-on condition disappears, except if the glow plugs are switched on because of load dump. then they remain switched on until v vs is less than v vs ov for at least t vs fil . in modes 2 to 6, the L9524C is additionally supplied by the ba t pin. this auxiliary supply ensures that the external power mosfets are switched off if no main supply voltage is available at the vs pin. the bat pin is additionally used to sense the battery voltage v bat for power regulation in modes 4 and 6 (see section ?power regulation?) and for detecting ?battery undervoltage failure? (fuse between battery and module is defect) if v bat is less than v bat uv for at least t bat fil in modes 2 to 6. an additional supply voltage higher than the main supply voltage is generated by an internal charge pump which charges an external stora ge capacitor connected to the cp pin. this capacitor mainly supplies the gates of the external n-channel power mosfets. the charge pump voltage v cp is monitored and the glow plugs are switched off if it is less than v cp uv for at least t cp fil (?charge pump undervoltage?). afterwards, the glow plugs remain switched glow plug shunt v bat gx spx snx L9524C glow plug v bat gx spx snx L9524C shunt sense transistor sense 015 4 .com u datasheet
functional description L9524C 14/27 off even if the charge pump voltage becomes greater than v cp uv until they are explicitly switched on again by the ci (control input) pin.control input the control input (ci) pin is resistively pulled up r ci to the supply voltage v vs such that v ci =v ci off and the glow plugs are switched off by default. the L9524C is controlled by transitions of v ci from v ci off to v ci on (falling edge) and vice versa (rising edge). voltage level changes of v ci which last shorter than t ci fil are ignored. in transistor mode (modes 3 to 6) the L9524C expects a pwm signal at the ci pin. each falling edge starts measuring its on time t ci on (time until next rising edge, i.e. length of this low pulse) and its period t ci (time until next falling edge). the end of a pulse group is detected if no falling edge oc curs for a time greater than t ci to and the glow plugs are switched off. therefore, it is not possible to switch on the glow plugs permanently with one exception: if the low voltage level of the first falling edge is greater than v ci to the glow plugs remain switched on as long as this low pulse lasts. figure 4. control input signal in transistor mode (modes 3 to 6) figure 5. permanent switch on of glow plug s at first falling edge in transistor mode (modes 3 to 6) v ci t v ci off v ci on 0.6 . v vs 0.4 . v vs t glow plug 1 on off t ci to t ci to t ci t ci on t ci to t ci fil t ci fil t ci fil +t del t ci fil +t del ignored (shorter than t ci fil ) v ci t v ci off v ci on 0.6 . v vs 0.4 . v vs t glow plug 1 on off t ci to t ci to v ci to t ci to t ci to 4 .com u datasheet
L9524C functional description 15/27 though in mode 2 (relay mode, serial diagnostic interface protocol) the relay should be switched permanently the L9524C also expects a pwm signal at the ci pin since the serial diagnostic interface protocol is synchronized by falling edges of the ci signal (see section ?diagnostic output?). the relay then is switched on permanently if the off time (time between rising and falling edge) of th e pwm signal is less than t io sup since the relay output suppresses pulses shorter than t io sup (see section ?relay output?). for the same reason the relay is switched off permanently if the on time (time between falling a nd rising e dge) of the pwm signal is less than t io sup . in all other cases the relay is switched according to the pwm signal at the ci pin. figure 6. control input signal in mode 2 for permanent switch on in mode 1 (relay mode, go/no-go diagnostic interface protocol) no edges are necessary for the go/no-go protocol. therefore the relay is switched on if v ci = v ci on and it is switched off if v ci = v ci off . 4.3 diagnostic output the diagnostic output stage of the L9524C (do pin) consists of a current-limited low-side switch and a pull-up resistor r do to the vs pin. the voltage level of a logical low signal v dol is given by the drop across the low-side switch and the voltage level of a logical high signal is equal to v vs . the L9524C is able to detect the following failures (see sections ?supply?, ?current monitoring?, and ?switch monitoring?): open-load (6 glow plugs), overcurrent (6 glow plugs, stored until power-down), any switch is defect (4 switches), supply voltage (v vs ) is too low (?undervoltage?), supply voltage (v vs ) is too high (?overvoltage?), junction temperature (t j ) is too high, charge pump voltage (v cp ) is too low (?charge pump undervoltage?), and battery voltage (v bat ) is too low (?battery undervoltage?). v ci t v ci off v ci on 0.6 . v vs 0.4 . v vs t relay on off t ci t io sup t io sup t ci fil +t del 4 .com u datasheet
functional description L9524C 16/27 in order to report the occurrence of any of the above-listed failures to the diesel engine management system the L9524C provides two protocols: go/no-go protocol for mode 1 and serial protocol for modes 2 to 6. the go/no-go protocol is only able to report if any of the above-listed failures occurred. this is done according to the following table: note: overcurrent failures are stored until power-down. the serial protocol is able to report different kinds of failures and to assign them to the corresponding glow plugs. therefore, occurring failures are written into an internal 8-bit failure register: bits 1 to 6 are assigned to the glow plugs. depending on bit 7 they show open-load (bit 7 is low) or overcurrent failu res (bit 7 is high). bit 8 shows if there is any of the listed failures (?module failure?). in case of a battery undervoltage failure bits 7 and 8 are high and all other bits are low as long as there is no overcurrent failure stored. for transmitting the contents of the failure register the pwm signal applied to the ci pin is used as clock input: at any falling edge of the ci signal (see section ?c ontrol input ?) the do pin shows the value of the next bit of the bitstream after t do del . each transmission frame consists of a beginning delimiter (one low bit) followed by the 8 bits of the failure register beginning with bit 1. after the ending delimiter (one high bit) the diagnostic output stage is inactive and is resistively pulled up to v vs . v ci v do at ?no failure? v do at ?any failure? v ci off v dol v vs v ci on v vs v dol bit meaning of high state 1 open-load or overcurrent (1) failure at glow plug 1 1. overcurrent failures ar e stored until power-down 2 open-load or overcurrent (1) failure at glow plug 2 3 open-load or overcurrent (1) failure at glow plug 3 4 open-load or overcurrent (1) failure at glow plug 4 5 open-load or overcurrent (1) failure at glow plug 5 6 open-load or overcurrent (1) failure at glow plug 6 7 overcurrent failure at any glow plug (1) or battery voltage (v bat ) is too low (2) (?battery undervoltage?) 2. if battery voltage is too low (?ba ttery undervoltage?) bits 7 and 8 are high 8 one or more of the following failures (?module failure?): any switch is defect supply voltage (v vs ) is too low (?undervoltage?) supply voltage (v vs ) is too high (?overvoltage?) junction temperature (t j ) is too high charge pump voltage (v cp ) is too low (?charge pump undervoltage?) battery voltage (v bat ) is too low (2) (?battery undervoltage?) 4 .com u datasheet
L9524C functional description 17/27 the L9524C starts transmitting the first frame at the very first falling ed ge of the ci signal after power-on. since at that time the contents of the failure register are clear the first 9 bits (beginning delimiter followed by the contents of the 8-bit failure register) which are transmitted are always low. the L9524C repeats transmission of the frame every 32 falling edges of the ci signal. only during the time when the diagnostic output stage is inactive (i.e. between the transmission of two frames) the contents of the failure register can be written. figure 7. serial diagnostic interface protocol 4.4 current monitoring the L9524C is able to monitor the current through 6 glow plugs by measuring the voltage drop across sense resistors. therefore, there are 4 positive sense input pins (sp1, sp2, sp3, sp4) and 6 negative sense input pins (sn1, sn2, sn3, sn4, sn5, sn6). the sense input pins must be connected to the sense resistors according to the following table: in relay mode (modes 1 and 2) the positive s ense input pins are short-circuited since the relay is the only switch. in transistor mode (modes 3 to 6) glow plug 5 is switched with transistor 2 and glow plug 6 with transistor 4. therefore only 4 positive sense input pins are necessary. bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 low high high bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 low beginning delimiter ending delimiter contents of failure register (all bits='low' at 1st frame) contents of failure register diagnostic output stage inactive beginning delimiter ending delimiter first frame frame 01234567891011 31 0 12345678910 ... v vs v ci v ci off v ci on v d o v vs v dol t t t ... ... ... sense resistor of glow plug positive sense input pin negative sense input pin 1sp1sn1 2sp2sn2 3sp3sn3 4sp4sn4 5sp2sn5 6sp4sn6 4 .com u datasheet
functional description L9524C 18/27 if the voltage drop across the sense resistor is less than v ol for at least t ol fil an open-load failure is detected as long as v vs > v vs ol . if it is greater than v oc (see below for definition) for at least t oc fil an overcurrent failure is detected and the corresponding switch is switched off and remains switched off until power-down. the threshold for overcurrent failures v oc can be varied by the voltage applied to the oct pin (see section ?overcurrent threshold variation?). in modes 1 to 4 the overcurrent threshold is constant with respect to the temperature (tc oc = 0). but in modes 5 and 6 the overcurrent threshold increases linearly with the temperature ? to compensate the first-order temperature coefficient of the r ds(on) of the external power mosfets which are used as sense resistors in these modes: equation 1 v oc = v oc 0 (1 + tc oc ( ? + 40 c)). 4.5 switch monitoring the L9524C monitors the voltages across the glow plugs (using the negative sense input pins sn1, sn2, sn3, and sn4) to detect if the corresponding switches work properly or not. a switch is detected as defect if it is switched on but the voltage across the corresponding glow plug(s) is less than v sd for at least t sd fil or if it is switched off but the voltage across the glow plug(s) is greater than v sd for at least t sd fil . 4.6 thermal shutdown if the junction temperature becomes greater than t jsd all glow plugs are switched off. they are switched on again if the junction temperature falls below t jsd . 4.7 gate drivers the L9524C contains four gate drivers (gx pins) for external n-channel power mosfets in high-side configuration. each gate driver provides a slope control by charging and discharging the gates of the external power mosfets with constant currents (i g on or i g off ). to adjust the slopes these currents can be va ried using the cur pin (see section ?gate charge/discharge current variation?). the charging current source is supplied by an external capacitor connected to the charge pump output (cp) pin. the gate-to-source voltages are limited internally and wit hout supply voltage (v vs ) the gates and the sources of the external power mosfets are short-circuited. during free-wheeling of inductive loads the gates of the external power mosfets are clamped to v g cl . as a result, the power mosfets become conducting and the energy in the inductive loads is recirculated through the power mosfets. 4.8 relay output in relay mode (modes 1 and 2) the io pin is used as output pin to control an external relay driver (e.g. a low-side switch which drives the relay). if the output stage of the io pin is switched on it behaves like a voltage source (v io ) with output resistance r io . if it is switched off a pull-down current source is activated (i io ). the relay output suppresses pulses shorter 4 .com u datasheet
L9524C functional description 19/27 than t io sup such that the relay can be permanently switched by applying appropriate pwm signals to the ci pin (see section ?control input?). in transistor mode (modes 3 to 6) the io pin is used as input pin. left open it is pulled down to ground and the power regulation feature (see section ?power regulation?) is activated (v io v io pr ). 4.9 gate charge/discharge current variation the cur pin provides a constant current-limited output voltage v cur . this voltage can be applied to an external resistor making current flow out of the cur pin. as a result, the default gate charge (or discharge) current i g on (or i g off ) is reduced by a multiple di gon /di cur (or di g off /di cur ) of the current flowing out of the cur pin. in order to select the mode of operation the io pin and/or the ms pin may be connected to the cur pin (see section ?modes?). the io pin contains a pull-down current source and the ms pin contains a pull-up current source . these currents are compensated if the corresponding pin is connected to the cur pin in or der not to affe ct the gate charge/dischar ge current. figure 8. variation of gate charge/discharge current 4.10 overcurrent threshold variation the overcurrent threshold v oc can be varied by connecting the oct pin to an external resistive voltage divider between cur pin and ground. if the oct pin is left open it is pulled up to an internal supply voltage by a current source and a default value is used for the overcurrent threshold. this default value corresponds to the condition: v oct = v cur /6. in order not to detune the voltage divider the pull-up current i oct source is deactivated when any glow plug is switched on. |i g | i cur |i g off | or |i g on | 0 |di g off /di cur | or |di g on /di cur | 4 .com u datasheet
functional description L9524C 20/27 4.11 advanced run-off control in transistor mode (modes 3 to 6) the glow plugs are switched by an advanced run-off control. the target is to minimize changes in the load current. therefore, the pwm signals applied to the glow plugs are phase-shifted to each other. there is a 5-step start-up procedure at the beginning of a switching sequence. in step 1 the phase shift between the glow plugs is set to a fixed value t del . therefore, all glow plugs are switched on once in the first period of the pwm control input signal (ci) and are heated up quite simultaneously. during the start-up procedure the phase shift becomes a value equal to the on time of one glow plug. as a result, after the start-up procedure the glow plugs are switched on one after the other to get minimal changes in the load current. figure 9. timing diagram of advanced run-off control 4.12 output timing in transistor mode (modes 3 to 6) there is a delay t gap between switching off one glow plug and switching on the next one to avoid overlaps. additionally, failures occurring during the slope (i.e. in the time period t sup after switching) are suppressed in all modes. figure 10. output timing 4 .com u datasheet
L9524C functional description 21/27 4.13 power regulation the power through each glow plug (here expressed by v rms which is the root-mean-square voltage across one glow plug) depends on the battery voltage v bat and the duty cycle t g on /t g of the pwm signal applied to the external power mosfets: equation 2 in order to regulate the power through the glow plugs the L9524C measures v bat and adjusts t g on /t g of the gate drivers (g1...4) such that v rms = v rms ref , where v rms ref represents the desired power through each glow plug. the desired power v rms ref is given by the input duty cycle t ci on /t ci which represents the desired output duty cycle at a nominal battery voltage of 12v: equation 3 as a result, the actual output duty cycle of the gate drivers is given by: equation 4 note: the L9524C varies both the on time t g on and the period t g of the pwm output signal to vary the duty cycle t g on /t g . the accuracy of the power regulation is given by v rms = v rms - v rms ref . v rms v bat t g on t g ----------- - ? = v rms ref 12v t ci on t ci ------------ - ? = t g on t g ----------- - 12v v bat ------------- - ?? ?? 2 t ci on t ci ------------ - ? = 4 .com u datasheet
application diagrams L9524C 22/27 5 application diagrams figure 11. mode 1: relay mode, go/no-go diagnostic interface protocol figure 12. mode 2: relay mode, serial diagnostic interface protocol 4 .com u datasheet
L9524C application diagrams 23/27 figure 13. mode 3: transistor mode, shunt sense, no power regulation figure 14. mode 4: transistor mode, shunt sense, power regulation 4 .com u datasheet
application diagrams L9524C 24/27 figure 15. mode 5: transistor mode, transistor sense, no power regulation figure 16. mode 6: transistor mode, transistor sense, power regulation 4 .com u datasheet
L9524C package information 25/27 6 package information in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 17. so24 mechanical data and package dimensions outline and mechanical data dim. mm inch min. typ. max. min. typ. max. a 2.35 2.65 0.093 0.104 a1 0.10 0.30 0.004 0.012 b 0.33 0.51 0.013 0.200 c 0.23 0.32 0.009 0.013 d (1) 15.20 15.60 0.598 0.614 e 7.40 7.60 0.291 0.299 e 1.27 0.050 h 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 l 0.40 1.27 0.016 0.050 k 0? (min.), 8? (max.) ddd 0.10 0.004 (1) ?d? dimension does not include mold flash, protusions or gate burrs. mold flash, protusions or gate burrs shall not exceed 0.15mm per side. so24 0070769 c weight: 0.60gr 4 .com u datasheet
revision history L9524C 26/27 7 revision history table 6. document revision history date revision description of changes 22-sep-2006 1 initial release 4 .com u datasheet
L9524C 27/27 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2006 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com 4 .com u datasheet

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